Senior FPGA Engineer II Job
Job Description Job Attributes+
AS&T - Radar & Weapon Systems-21001080
Plano, TX, US
Day - 1st
Yes, 10 % of the Time
Responsibility for design support tasks including requirements analysis, generation of specific flow-down specifications from system level requirements, Interface definition, development of test plans and procedures for FPGA integration, and creation of all relevant design description documentation and comment records to ensure the delivery of a quality finished product.
- Schedule, cost, and technical commitments and responsibility
- Engage in all phases of product development, including concept, architecture, design, and test
- Development of or interfacing with a Universal verification modification (UVM verification environment
- Interface with HW/SW engineers to test and verify electrical interfaces and protocols between the FPGA and embedded system devices
- Perform detailed technical analyses and create test and analysis reports
- Participate in interdisciplinary design teams and reviews such as peer reviews, PDRs, CDRs, and other technical exchange forums
- Learn and follow company processes for product development, configuration management, purchasing, etc.
- Other duties as assigned
Must be a U.S. Citizen with ability to obtain and maintain a DoD clearance and the ability to obtain any additional clearances as required
Bachelor’s degree in Electrical Engineering
A minimum of 7 - 10 years’ experience of successful FPGA code development
Proficiency in VHDL code development, simulation, verification, constraints, and methods to reach timing closure and a thorough knowledge of Xilinx FPGA products and development environments
Expertise in laboratory debug techniques and capable of simulation test benching within the Mentor ModelSim environment or equivalent simulation tools to produce bit-accurate results
Able to examine, understand, and modify existing VHDL in order to adapt functioning code to new requirements with minimal perturbation
Fundamental understanding of digital board level electrical interfaces, including ADCs, DACs, DSPs, High Speed SERDES, Flash and SDRAM.
- Design experience with standard interfaces and protocols (e.g., SPI, Analog Device DSP Proprietary Link Port and PPI interfaces, Flash and SDRAM)
- Experience with PicoBlaze/MicroBlaze and Xilinx Zynq/Altera SoC ARM-based devices is desired
- Desired experience includes an understanding of fundamental DSP algorithms and implementation methods and Synopsys Design Constraints
- Previous experience in Xilinx Vivado Design Suite, familiarity with Tcl, Verilog, C/C , Python, and experience in Matlab/Simulink/System Generator Design flow are all desired but not required
- Knowledge of Altera product line and design tools, including Quartus II Design Software, Qsys, SOPC Builder is desired
Physical requirements include the ability to lift up to 20 lbs. and the ability to travel up to 10%
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